Fault Current Limiters

Fault current limiters using high temperature semiconductors offer a possible solution to controlling fault current levels on utility distribution and transmission networks. Such fault current limiters, unlike reactors or high-impedance transformers, will limit fault currents without adding impedance to the circuit during normal operation.

Device Modeling

In order to carry out the design of power electronics using new power device technology such as SiC, new device models are required. The UA team has developed SiC diode, JFET, MOSFET, thyristor (p-type) and IGBT (p-type) device models so that if the designs employ these devices they can successfully be simulated in modern simulators such as the Saber simulator from Synopsys. Thus, power electronic circuits can be designed using such simulation tools.

Mixed-Signal IC Design

The main objective for the IC design effort is to support the designs of the FCL and DER prototypes of the Power Electronics Team. The MSCAD Laboratory is extremely adept at leading edge analog and mixed-signal design in Silicon technologies and is actively seeking to push this into the new realm of Silicon Carbide low-voltage integration.

Research Partners

Industrial Partners

  • United Technologies Research Center
  • Toyota
  • NNSA
  • Monolith Semiconductor
  • Apiq
  • SineWatts
  • Ozark Integrated Circuits
  • National Renewable Energy Laboratory
  • Los Alamos National Laboratory
  • Florida Power & Light
  • Duke Energy
  • Southern Company
  • Orlando Utility commission
  • Kentucky Power
  • TVA
  • East Kentucky Power Cooperative
  • Siemens
  • SAIC
  • Leidos
  • Schneider Electric
  • S&C
  • Northern Plains Power Technologies
  • OSI
  • Mitsubishi Power Systems Americas

Academic Partners

  • Auburn
  • South Carolina
  • Kansas State
  • Osaka University
  • Kyoto University
  • Yonsei University
  • Georgia Tech
  • University of Central Florida
  • University of Kentucky
  • Florida Sate University
  • University of Florida